`timescale 1ns / 1ps
module moore(
input clock,
input in_50,
input in_100,
input reset,
output reg cioco
);
localparam Q0 = 3'b000;
localparam Q50 = 3'b001;
localparam Q100 = 3'b010;
localparam Q150 = 3'b011;
localparam Q200 = 3'b100;
localparam Q250 = 3'b101;
localparam Q300 = 3'b110;
localparam Q350 = 3'b111;
reg [2:0] state, state_next;
always @(posedge clock) begin
if(reset == 1)
state <= Q0;
else
state<=state_next;
end
always @(*) begin
state_next=state;
case(state_next)
Q0: begin
if(in_50==0 && in_100==0)
state_next=Q0;
else
if(in_50==1 && in_100==0)
state_next=Q50;
else
if(in_50==0 && in_100==1)
state_next=Q100;
else
state_next=Q150;
end
Q50: begin
if(in_50==0 && in_100==0)
state_next=Q50;
else
if(in_50==1 && in_100==0)
state_next=Q100;
else
if(in_50==0 && in_100==1)
state_next=Q150;
else
state_next=Q200;
end
Q100: begin
if(in_50==0 && in_100==0)
state_next=Q100;
else
if(in_50==1 && in_100==0)
state_next=Q150;
else
if(in_50==0 && in_100==1)
state_next=Q200;
else
state_next=Q250;
end
Q150: begin
if(in_50==0 && in_100==0)
state_next=Q150;
else
if(in_50==1 && in_100==0)
state_next=Q200;
else
if(in_50==0 && in_100==1)
state_next=Q250;
else
state_next=Q300;
end
Q200: begin
if(in_50==0 && in_100==0)
state_next=Q200;
else
if(in_50==1 && in_100==0)
state_next=Q250;
else
if(in_50==0 && in_100==1)
state_next=Q300;
else
state_next=Q350;
end
Q250: begin
if(in_50==0 && in_100==0)
state_next=Q0;
else
if(in_50==1 && in_100==0)
state_next=Q50;
else
if(in_50==0 && in_100==1)
state_next=Q100;
else
state_next=Q150;
end
Q300: begin
if(in_50==0 && in_100==0)
state_next=Q50;
else
if(in_50==1 && in_100==0)
state_next=Q100;
else
if(in_50==0 && in_100==1)
state_next=Q150;
else
state_next=Q200;
end
Q350: begin
if(in_50==0 && in_100==0)
state_next=Q100;
else
if(in_50==1 && in_100==0)
state_next=Q150;
else
if(in_50==0 && in_100==1)
state_next=Q200;
else
state_next=Q250;
end
endcase
end
always @(*) begin
if(state==Q250 || state==Q300 || state==Q350)
cioco=1;
else
cioco=0;
end
endmodule
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