2.4.6. Executing PROC_DLATCH pass (convert process syncs to latches).
2.8.1.6. Executing PROC_DLATCH pass (convert process syncs to latches).
2.16.4.6. Executing PROC_DLATCH pass (convert process syncs to latches).
Generating RTLIL representation for module `\$_DLATCH_N_'.
Generating RTLIL representation for module `\$_DLATCH_P_'.
Mapping \$_DLATCH_P_.$ternary$/usr/local/bin/../share/yosys/ecp5/latches_map.v:10$31584 ($mux).
Finding identical cells in module `\$_DLATCH_P_'.
Running muxtree optimizer on module \$_DLATCH_P_..
Optimizing cells in module \$_DLATCH_P_.
Finding identical cells in module `\$_DLATCH_P_'.
Finding unused cells or wires in module \$_DLATCH_P_..
Mapping saturn_core.$auto$simplemap.cc:517:simplemap_dlatch$14852 using \$_DLATCH_P_.
Mapping saturn_core.$auto$simplemap.cc:517:simplemap_dlatch$14853 using \$_DLATCH_P_.
Mapping saturn_core.$auto$simplemap.cc:517:simplemap_dlatch$14854 using \$_DLATCH_P_.
Mapping saturn_core.$auto$simplemap.cc:517:simplemap_dlatch$14855 using \$_DLATCH_P_.
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