1. ----------------------------------------------------------------------------------
2. -- Company:
3. -- Engineer:
4. --
5. -- Create Date:    10:45:29 04/08/2019
6. -- Design Name:
7. -- Module Name:    licznik - Behavioral
8. -- Project Name:
9. -- Target Devices:
10. -- Tool versions:
11. -- Description:
12. --
13. -- Dependencies:
14. --
15. -- Revision:
16. -- Revision 0.01 - File Created
17. -- Additional Comments:
18. --
19. ----------------------------------------------------------------------------------
20. library IEEE;
21. use IEEE.STD_LOGIC_1164.ALL;
22. use ieee.std_logic_arith.all;
23. use ieee.std_logic_unsigned.all;
24.  
25.  
26. -- Uncomment the following library declaration if using
27. -- arithmetic functions with Signed or Unsigned values
28. --use IEEE.NUMERIC_STD.ALL;
29.  
30. -- Uncomment the following library declaration if instantiating
31. -- any Xilinx primitives in this code.
32. --library UNISIM;
33. --use UNISIM.VComponents.all;
34.  
35. entity licznik is
36.     Port ( clock : in  STD_LOGIC;
37.            reset : in  STD_LOGIC;
38.            q_out : out  STD_LOGIC_VECTOR (2 downto 0));
39. end licznik;
40.  
41. architecture Behavioral of licznik is
42. signal rejestry_d :std_logic_vector (2 downto 0):="000";
43.  
44. begin
45.         process (clock, reset)
46.                 begin
47.                         if reset = '0' then
48.                                 rejestry_d <="000";
49.                         elsif clock'event and clock = '1' then
50.                                 rejestry_d(0) <= (rejestry_d(2) and rejestry_d(1)) or (not rejestry_d(0));
51.                                 rejestry_d(1) <= ((not rejestry_d(1)) and rejestry_d(0)) or (rejestry_d(1) and (not rejestry_d(0)));
52.                                 rejestry_d(2) <= (rejestry_d(2) and (not rejestry_d(0))) or (rejestry_d(2) and (not rejestry_d(1))) or ((not rejestry_d(2)) and rejestry_d(1) and rejestry_d(0));
53.                         end if;
54.                 end process;
55.         q_out <= rejestry_d;
56. end Behavioral;
57.  
58.